1. Field of the Invention
The present invention relates to methods for erasing flash memory. More particularly, the present invention relates to a method for erasing non-uniform flash memory sectors and a method for erasing flash memory sector groups.
2. Description of the Related Art
Every time a flash memory cell is erased, there is always a possibility that its threshold voltage becomes lower. Over-erase is the situation when there is bit line leakage in a flash memory cell. If such a memory cell is erased again, deep over-erase may happen. Deep over-erase is unrecoverable and should be avoided.
FIG. 1 is a flow chart of a conventional method for erasing a flash memory sector group. A sector group is a set consisting of multiple memory sectors. An erase (ERS) pulse is applied to a sector group in step 110, erasing all sectors in the group at the same time. And then an erase verification (ERSV) is performed on the group in step 120. If all cells pass the ERSV, the flow in FIG. 1 terminates. Otherwise, the flow returns to step 110, where another erase pulse is applied to the flash memory sector group. The loop of steps 110 and 120 is repeated until all cells pass the ERSV.
The ERSV is performed address by address. Therefore, an address counter is necessary for keeping the current verification address. FIG. 2 is a schematic diagram showing an address counter 201 and some memory sectors 211˜214 of a flash memory chip. The sector group in FIG. 2 is erased by the method in FIG. 1. Assume the ERSV begins at the first address of sector 211. The problem is that whenever a memory cell fails in the ERSV, another erase pulse is applied to the entire group and then the ERSV has to start all over again. Consequently, the memory cells at the high end of address may be erased an undesirably large number of times and deep over-erase may occur. In this example, deep over-erase is most likely to occur in sector 214.
A solution for the problem above is assigning an address counter to each memory sector, as shown in FIG. 3. The flash memory chip in FIG. 3 has four sectors 311˜314 and four address counters 301˜304 corresponding to the sectors 311˜314. Each address counter 301˜304 stores the verification address of the corresponding sector 311˜314. If a sector in FIG. 3 is erased and passes the erase verification, the sector will not be erased again. This solution greatly reduces the risk of deep over-erase. However, due to the extra address counters, the flash memory chip in FIG. 3 occupies much more layout space than the chip in FIG. 2 does.
Another solution to prevent deep over-erase is the method shown in FIG. 4. FIG. 4 is a flow chart of another conventional method for erasing a flash memory group. Firstly, an erase (ERS) pulse is applied to the memory group in step 410. And then a soft program verification (SPGMV) is performed on the group to check for bit line leakage in step 420. If a sector fails in step 420, that means the sector has bit line leakage and a soft program (SPGM) is performed on the sector to fix the leakage in step 430. After the SPGM the sector is verified again in step 420. The loop of steps 420 and 430 is repeated until the sector is completely fixed. Now all sectors have passed the SPGMV in step 420. And then an erase verification (ERSV) is performed on the group in step 440. If the group passes the ERSV, the flow of the method terminates. Otherwise, the flow returns to step 410 where the group is erased again. This method prevents deep over-erase by fixing leaking sectors before another erase pulse is applied. However, it is possible that a sector gets leaky every time and has to be fixed again and again. A lot of time would be wasted in such a situation.